Reconfigurable Supercomputing: the Progress, the Challenges and the Potential

The synergy between high-performance computing and reconfigurable computing, based on field programmable gate arrays (FPGAs), has resulted in a new class of computer architectures, namely reconfigurable high-peformance computer systems (also known as Reconfigurable Supercomputers). Such systems inherently support both fine-grain and coarse-grain parallelism, and can potentially tune their architecture dynamically to fit applications. In addition to the very rich body of research work, this direction has resulted in commercial reconfigurable supercomputers from Cray, SGI Altix/RASC, SRC, and Linux Networx.

In this talk, we characterize the advances in this field through our own first hand experience with a wide array of high-performance reconfigurable computers and high-level programming paradigms for reconfigurable hardware. Architectural issues at the chip, node and system scalability level are identified using a range of applications from Cryptography, remote sensing, and bioinformatics workloads developed by our groups. Programming models issues are also examined. Finally, the benefits, potential as well as the challenges for this direction will be evaluated.